PM7385 FREEDM-84A672
DATA SHEET
PMC-1990114
ISSUE 6
84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER
WITH ANY-PHY PACKET INTERFACE
Figure 16 – Receive APPI Timing (Normal Transfer)
RXCLK
RXADDR[2:0]
RPA
Dev 0
NULL
Dev 7
Dev 0
NULL
Dev 6
Dev 7
NULL
Dev 4
Dev 6
NULL
Dev 0
Dev 4
NULL
Dev 1
Dev 0
NULL
Dev 3
Dev 1
NULL
D6
Dev 2
Dev 3
NULL
Dev 2
RENB
Dev 0
D1
Dev 0
RXDATA[15:0]
RVAL
CH 2
D0
D2
D3
D4
D5
D7
RSX
REOP
RMOD
RERR
Figure 16 shows the transfer of an 8 word packet across the Rx APPI from
FREEDM-84A672 device 0, channel 2. In this example, seven FREEDM-84A672
devices are sharing the Rx APPI, with device 5 being the null address.
The data transfer begins when the external controller selects FREEDM-84A672
device 0 by placing that address on the RXADDR[2:0] inputs and setting RENB
high. The external controller sets RENB low in the next RXCLK cycle to
commence data transfer across the Rx APPI. The FREEDM-84A672 samples
RENB low and responds by asserting RSX one RXCLK cycle later. The start of
all burst data transfers is qualified with RSX and an in-band channel address on
RXDATA[15:0] to associate the data to follow with a HDLC channel.
During the cycle when D2 is placed on RXDATA[15:0], the external controller is
unable to accept any further data and sets RENB high. Two RXCLK cycles later,
the FREEDM-84A672 tristates the Rx APPI. The external controller may hold
RENB high for an indeterminate number of RXCLK cycles. The FREEDM-
84A672 will wait until the external controller returns RENB low. Because the
FREEDM-84A672 does not support interrupted data transfers on the Rx APPI,
the external controller must reselect FREEDM-84A672 device 0 or output a null
address during the clock cycle before it returns RENB low. However, while
RENB remains high, the address on the RXADDR[2:0] signals may change.
When the FREEDM-84A672 device 0 samples RENB low, it continues data
transfer by providing D4 on RXDATA[15:0]. Note that if D3 were the final word of
the packet (Status), in response to sampling REOP high, the external controller
does not have to reselect FREEDM-84A672 device 0. This is shown in Figure
19.
The FREEDM-84A672 will not pause burst data transfers across the Rx APPI.
The FREEDM-84A672 automatically deselects at the end of all burst data
transfers. The FREEDM-84A672 must be reselected before any further data will
be transferred across the Rx APPI.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
211
PMC [ PMC-SIERRA, INC ]
