RELEASED
PM7383 FREEDM-32A256
DATASHEET
PMC-2010336
ISSUE 1
FRAME ENGINE AND DATA LINK MANAGER 32A256
Register 0x10C : RCAS Channel Disable
Bit
Type
Function
Default
Bit 15
R/W
CHDIS
0
Bit 14
to
Unused
XXH
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reserved
Reserved
DCHAN[7]
DCHAN[6]
DCHAN[5]
DCHAN[4]
DCHAN[3]
DCHAN[2]
DCHAN[1]
DCHAN[0]
0
0
0
0
0
0
0
0
0
0
This register controls the disabling of one specific channel to allow orderly
provisioning of time-slots associated with that channel.
DCHAN[7:0]:
The disable channel number bits (DCHAN[7:0]) selects the channel to be
disabled. When CHDIS is set high, the channel specified by DCHAN[7:0] is
disabled. Data in time-slots associated with the specified channel is ignored.
When CHDIS is set low, the channel specified by DCHAN[7:0] operates
normally.
CHDIS:
The channel disable bit (CHDIS) controls the disabling of the channels
specified by DCHAN[7:0]. When CHDIS is set high, the channel selected by
DCHAN[7:0] is disabled. Data in time-slots associated with the specified
channel is ignored. When CHDIS is set low, the channel specified by
DCHAN[7:0] operates normally.
PROPRIETARY AND CONFIDENTIAL
99
PMC [ PMC-SIERRA, INC ]
