RELEASED
PM7383 FREEDM-32A256
DATASHEET
PMC-2010336
ISSUE 1
FRAME ENGINE AND DATA LINK MANAGER 32A256
Register 0x200 : RHDL Indirect Channel Select
Bit
Type
Function
Default
Bit 15
Bit 14
R
R/W
BUSY
CRWB
Unused
X
0
XH
Bit 13
to
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reserved
Reserved
CHAN[7]
CHAN[6]
CHAN[5]
CHAN[4]
CHAN[3]
CHAN[2]
CHAN[1]
CHAN[0]
0
0
0
0
0
0
0
0
0
0
This register provides the channel number used to access the receive channel
provision RAM. Writing to this register triggers an indirect channel register
access.
CHAN[7:0]:
The indirect channel number bits (CHAN[7:0]) indicate the receive channel to
be configured or interrogated in the indirect access.
CRWB:
The channel indirect access control bit (CRWB) selects between a configure
(write) or interrogate (read) access to the receive channel provision RAM.
Writing a logic zero to CRWB triggers an indirect write operation. Data to be
written is taken from the Indirect Channel Data registers. Writing a logic one
to CRWB triggers an indirect read operation. The data read can be found in
the Indirect Channel Data registers.
PROPRIETARY AND CONFIDENTIAL
103
PMC [ PMC-SIERRA, INC ]
