RELEASED
PM7383 FREEDM-32A256
DATASHEET
PMC-2010336
ISSUE 1
FRAME ENGINE AND DATA LINK MANAGER 32A256
Register 0x104 : RCAS Indirect Channel Data
Bit
Type
Function
Default
Bit 15
Bit 14
R/W
R/W
CDLBEN
PROV
0
0
Bit 13
to
Unused
XH
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reserved
Reserved
CHAN[7]
CHAN[6]
CHAN[5]
CHAN[4]
CHAN[3]
CHAN[2]
CHAN[1]
CHAN[0]
0
0
0
0
0
0
0
0
0
0
This register contains the data read from the channel provision RAM after an
indirect read operation or the data to be inserted into the channel provision RAM
in an indirect write operation.
CHAN[7:0]:
The indirect data bits (CHAN[7:0]) report the channel number read from the
channel provision RAM after an indirect read operation has completed.
Channel number to be written to the channel provision RAM in an indirect
write operation must be set up in this register before triggering the write.
CHAN[7:0] reflects the value written until the completion of a subsequent
indirect read operation.
PROV:
The indirect provision enable bit (PROV) reports the channel provision enable
flag read from the channel provision RAM after an indirect read operation has
PROPRIETARY AND CONFIDENTIAL
96
PMC [ PMC-SIERRA, INC ]
