RELEASED
PM7380 FREEDM-32P672
DATA SHEET
PMC-1990262
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 32P672
addressability of read transactions. Other transactions must be dword aligned.
For byte-addressable transactions, the data transferred between the local device
and the GPIC need not be dword aligned with the data as it is presented on the
PCI bus. The GPIC will perform any byte-realignment required. In order to
complete a transfer involving byte re-alignment, the GPIC may need to add an
extra burst cycle to the PCI transaction.
9.6.3 Target Machine
The GPIC target machine performs all the required functions of a stand alone
PCI target device. The target block performs three main functions. The first is
the target state machine which controls the protocol of PCI target accesses to
the GPIC. The second function is to provide all PCI Configuration registers.
Last, the target block provides a Target Interface to the CBI registers in the other
FREEDM-32P672 blocks.
The GPIC tracks the PCI bus and decodes all addresses and commands placed
on the bus to determine whether to respond to the access. The GPIC responds
to the following types of PCI bus commands only: Configuration read and write,
memory read and write, memory-read-multiple and memory-read-line which are
aliased to memory read and memory-write-and-invalidate which is aliased to
memory write. The GPIC will ignore any access that falls within the address
range but has any other command type.
After accepting a target access as a medium speed device, the FREEDM-
32P672 inserts one wait state for a configuration read/write and five wait states
for other command types before completing the transaction by asserting TRDYB.
Burst accesses to the GPIC are accepted provided they are of linear type. If a
master makes a memory access to the GPIC with the lower two address bits set
to any value but "00" (linear burst type) the GPIC ignores the cycle. Burst
accesses of any length are accepted, but the FREEDM-32P672 will disconnect if
the master inserts any wait states during the transaction. The FREEDM-32P672
will also disconnect on every read and write access to configuration space after
transferring one Dword of data.
Figure 10 illustrates the GPIC address space.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
61
PMC [ PMC-SIERRA, INC ]
