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PM7380-PI 参数 Datasheet PDF下载

PM7380-PI图片预览
型号: PM7380-PI
PDF下载: 下载PDF文件 查看货源
内容描述: 帧引擎和数据链路管理32P672 [FRAME ENGINE AND DATA LINK MANAGER 32P672]
分类和应用:
文件页数/大小: 332 页 / 2479 K
品牌: PMC [ PMC-SIERRA, INC ]
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RELEASED  
PM7380 FREEDM-32P672  
DATA SHEET  
PMC-1990262  
ISSUE 5  
FRAME ENGINE AND DATA LINK MANAGER 32P672  
and the packet status information associated with the data in each buffer. TDs  
are transferred from the TMAC672 to the host and vice versa using descriptor  
reference queues. The TMAC672 maintains all the pointers for the operation of  
the queues. The TMAC672 acquires buffers with data ready for transmission by  
reading TDRs from a TDR ready queue. After a packet has been transmitted,  
the TMAC672 places the associated TDR onto a TDR free queue.  
To minimise host bus accesses, the TMAC672 maintains a descriptor reference  
table to store current DMA information. This table contains separate DMA  
information entries for up to 672 transmit channels. The TMAC672 also  
performs per-channel sorting of packets received in the TDR ready queue to  
eliminate head-of-line blocking.  
9.7.1 Data Structures  
The TMAC672 communicates with the host using Transmit Descriptors (TD),  
Transmit Descriptor References (TDR), the Transmit Data Reference Ready  
(TDRR) queue and the Transmit Data Reference Free (TDRF) queue.  
The TMAC672 reads packet data from data buffers in host memory. The TD,  
TDR, TDRR queue, and TDRF queue are data structures which are used to  
transfer host memory data buffer information. All four data structures are  
manipulated by both the TMAC672 and the host computer. The TD holds the  
data buffer size, data buffer address, and other packet information. The TDR is  
a pointer which is used to index into a table of TDs. The TDRR queue and TDRF  
queue allow the TMAC672 and the host to pass TDRs back and forth. These  
data structures are described in more detail in the following sections.  
Transmit Descriptor  
The Transmit Descriptors (TDs) pass buffer and packet information between the  
TMAC672 and the host. Both the TMAC672 and the host read and write  
information in the TDs. TDs are stored in host memory in a Transmit Descriptor  
Table. The Transmit Descriptor structure is shown in Figure 11.  
Figure 11 – Transmit Descriptor  
Bit 31  
0
Data Buffer Start Address [31:0]  
Bytes In Buffer [15:0]  
TMAC Next TD Pointer[14:0]  
Reserved (16)  
P
ABT IOC CE Res (2)  
TCC[9:0]  
Host Next TD Pointer[14:0]  
Transmit Buffer Size[15:0]  
V
M
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
64  
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