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PM7351-BGI 参数 Datasheet PDF下载

PM7351-BGI图片预览
型号: PM7351-BGI
PDF下载: 下载PDF文件 查看货源
内容描述: [Support Circuit, 1-Func, CMOS, PBGA304, 31 X 31 MM, 1.51 MM HEIGHT, 1.27 MM PITCH, SBGA-304]
分类和应用: ATM异步传输模式电信电信集成电路
文件页数/大小: 174 页 / 1840 K
品牌: PMC [ PMC-SIERRA, INC ]
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RELEASED  
PM7351 S/UNI-VORTEX  
DATA SHEET  
PMC-1980582  
ISSUE 5  
OCTAL SERIAL LINK MULTIPLEXER  
common equipment to the line cards. The S/UNI-VORTEX and S/UNI-DUPLEX,  
perform clock recovery, cell delineation, and header error monitoring for all  
receive high-speed serial links simultaneously. The maintained error counts and  
alarm status indications may be used by the control system to determine the  
state and viability of each high speed serial link.  
In these architectures, the S/UNI-DUPLEX will be connected to two S/UNI-  
VORTEXs, one on the active common card and one on the spare common card .  
Upon a failure of the active card, the spare card becomes the conduit for traffic.  
The S/UNI-VORTEX facilitates link selection upon start-up as well as switching  
between links upon failure conditions.  
Typically a centralized resource or cooperating distributed microprocessor  
subsystems will determine which common card is to be considered active for  
each downstream S/UNI-DUPLEX. The key to link selection lies in how the  
“ACTIVE” bit is handled by the S/UNI-VORTEX and S/UNI-DUPLEX. The control  
system uses the ACTIVE bit within each of the 8 Serial Link Maintenance  
registers to independently set the state of each link’s ACTIVE status. The  
current state of the link’s ACTIVE bit is sent downstream once per transmitted  
cell. The ACTIVE status is debounced and acted upon by the S/UNI-DUPLEX.  
The S/UNI-DUPLEX will only accept data traffic from one of its two LVDS links,  
and normally it is the link marked ACTIVE that is considered to be the working  
link. However, the S/UNI-DUPLEX can override this using local control. Thus,  
although the S/UNI-VORTEX may indicate the ACTIVE and spare links, it is  
actually the S/UNI-DUPLEX that must effect the protection switching. See the  
S/UNI-DUPLEX data sheet for additional details.  
The S/UNI-DUPLEX returns an ACTIVE bit status to indicate which link it has  
chosen as active. This reflected ACTIVE bit does not have a direct affect on the  
S/UNI-VORTEX, but its status is debounced (must remain the same for 3  
received cells) and then stored by the S/UNI-VORTEX in the Receive High-  
Speed Serial Cell Filtering Configuration/Status register. The reflected status can  
be used by the local control system to confirm receipt of the ACTIVE status by  
the S/UNI-DUPLEX.  
9.3 Cell Buffering and Flow Control  
The possibility of congestion is inherent in an access multiplexer. In the  
downstream direction, the WAN link can generate a burst of cells for a particular  
modem at a rate far exceeding the modem’s bandwidth capacity. Therefore,  
feedback to the traffic scheduler is required to cause it to buffer and smooth cell  
bursts to prevent downstream buffer overflow. In the upstream direction, the  
subscribed aggregate bandwidth can exceed that accommodated by the WAN  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
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