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PM7351-BGI 参数 Datasheet PDF下载

PM7351-BGI图片预览
型号: PM7351-BGI
PDF下载: 下载PDF文件 查看货源
内容描述: [Support Circuit, 1-Func, CMOS, PBGA304, 31 X 31 MM, 1.51 MM HEIGHT, 1.27 MM PITCH, SBGA-304]
分类和应用: ATM异步传输模式电信电信集成电路
文件页数/大小: 174 页 / 1840 K
品牌: PMC [ PMC-SIERRA, INC ]
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RELEASED  
PM7351 S/UNI-VORTEX  
DATA SHEET  
PMC-1980582  
ISSUE 5  
OCTAL SERIAL LINK MULTIPLEXER  
in the Bit Oriented Code Receiver Enable register. Unless fast declaration is  
necessary, it is recommended that the AVC bit be set to logic 0 to improve bit  
error tolerance. Valid BOC are indicated through the Receive Bit Oriented Code  
Status register. The BOC bits are set to all ones (111111) if no valid code has  
been detected. A maskable interrupt is generated to signal when a detected  
code has been validated, or optionally, when a valid code goes away (i.e. the  
BOC bits go to all ones).  
When the receiver is out of cell delineation (OCD) and the Receive Bit Oriented  
Code Status register will produce all ones (111111).  
The valid codes are provided in Table 3. The Reserved codes anticipate future  
enhanced feature set devices and should not be used. The User Defined codes  
may be used without restriction. Regardless of definition, all 63 codes may be  
validated and read by the microprocessor.  
Note that processing of the metalic loopback activate code is handled as a  
special case. The RXDn+/- data is looped back onto TXDn+/- at the end of the  
reception of the loopback activate code rather than when the code is first  
validated. For loopback to be initiated the loopback activate code must be first  
validated (received 8 out of 10 times) and then invalidated, typical by reception of  
another code. The loopback is not enable upon initial validation of the loopback  
activate code because the looped back signal, which still contains the original  
loopback activate command, would cause the far-end receiver to go into metallic  
loopback as well, thereby forming an undesirable closed loop condition! The  
loopback is cleared immediately upon the validation of the loopback deactivate  
code, assuming the MLB register bit is logic 0.  
To produce a loopback at the far end, program the Transmit Bit Oriented Code  
register with the loopback activate code for at least 1 ms and then revert to an  
another (typically idle) code. Upon termination of the loopback activate code, the  
data transmitted on TXDn+/- is expected to be received verbatim on the RXDn+/-  
inputs. When transmitting a loopback activate code, it is recommended the  
RDIDIS register bit be set to logic 1, or else a loss-of-signal or loss-of-cell-  
delineation event, would cause a premature loopback due to a pre-emptive  
Remote Defect Indication (RDI) code being sent.  
The remote reset activate and deactivate code words are supported by the  
S/UNI-DUPLEX (PM7350) device. The S/UNI-VORTEX can send the reset  
activate code to cause the S/UNI-DUPLEX device to assert its active low RSTOB  
output. The deactivate code causes deassertion of RSTOB. See the S/UNI-  
DUPLEX datasheet for details.  
The Remote Defect Indication (RDI) is sent whenever Loss of Signal (LOS) or  
Loss of Cell Delineation (LCD) is declared. This code word takes precedence  
over all others.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
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