RELEASED
PM7351 S/UNI-VORTEX
DATA SHEET
PMC-1980582
ISSUE 5
OCTAL SERIAL LINK MULTIPLEXER
A diagnostic loopback is effected if the DLB bit of the Serial Link Maintenance
register is set to logic 1. The transmit data and clock are inserted into the
receive datapath downstream of the clock recovery.
The metallic loopback can be effected in one of three ways: after the receipt of a
loopback activate bit-oriented code (as described on page 39), when the MLB bit
of the Serial Link Maintenance register is set to logic 1, or when the RSTB input
is asserted low. The loopback occurs at the LVDS transceiver after the
conversion to digital but before clock recovery . The looped back data may be
slightly distorted by the data slicing (conversion from differential to single-ended)
and the re-buffering that occurs.
Metallic loopback is terminated if a loopback deactivate bit oriented code is
received and validated, provided the MLB bit of the Serial Link Maintenance
register is logic 0.
9.2.1 Link Integrity Monitoring
Although the serial link bit error rate can be inferred from the accumulated
Header Check Sequence (HCS) errors, the option exists to perform error
monitoring over the entire bit stream.
When the feature is enabled the second User Prepend byte transmitted shall be
overwritten by the CRC-8 syndrome for the preceding cell. The encoding is valid
for all cells, including stuff cells. The CRC-8 polynomial is x8 + x2 + x + 1. The
receiver shall raise a maskable interrupt and optionally increment the HCS error
count. Simultaneous HCS and cell CRC-8 errors result in a single increment.
9.2.2 Bit Oriented Codes
Bit Oriented Codes (BOCs) are carried in the BOC bit position in the System
Prepend. The 63 possible codes can be used to carry predefined or user
defined signaling.
Bit oriented codes are transmitted as a repeating 16-bit sequence consisting of 8
ones, a zero, 6 code bits, and a trailing zero (111111110xxxxxx0). The code to be
transmitted is programmed by writing the Transmit Bit Oriented Code register.
The autonomously generated Remote Defect Indication (RDI) code, which is
generated upon a loss-of-signal or loss-of-cell-delineation, takes precedence
over the programmed code. RDI insertion can be disabled via the RDIDIS bit of
the Serial Link Maintenance register. RDI can be inserted manually by setting
the Transmit Bit Oriented Code register to all zeros.
The receiver can be enabled to declare a received code valid if it has been
observed for 8 out of 10 times or for 4 out of 5 times, as specified by the AVC bit
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
39
PMC [ PMC-SIERRA, INC ]
