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PM7351-BGI 参数 Datasheet PDF下载

PM7351-BGI图片预览
型号: PM7351-BGI
PDF下载: 下载PDF文件 查看货源
内容描述: [Support Circuit, 1-Func, CMOS, PBGA304, 31 X 31 MM, 1.51 MM HEIGHT, 1.27 MM PITCH, SBGA-304]
分类和应用: ATM异步传输模式电信电信集成电路
文件页数/大小: 174 页 / 1840 K
品牌: PMC [ PMC-SIERRA, INC ]
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RELEASED  
PM7351 S/UNI-VORTEX  
DATA SHEET  
PMC-1980582  
ISSUE 5  
OCTAL SERIAL LINK MULTIPLEXER  
To support current and future devices, the interface is configurable as either an  
Any-PHY or SCI-PHY interface. Table 1 summarizes the distinctions between  
the two protocols.  
Table 1 SCI-PHY and Any-PHY Comparison  
Attribute  
Latency  
SCI-PHY  
Any-PHY  
RDAT[15:0], RPRTY, RSOP and  
RSX are driven or become high  
impedance immediately upon  
sampling RENB low or high,  
respectively. RPA is driven  
immediately upon sampling a  
RADR[4:0] value that matches  
VADR[4:0].  
RDAT[15:0], RPRTY, RSOP and  
RSX are driven or become high  
impedance on the RCLK rising  
edge following the one that  
samples RENB low or high,  
respectively. RPA is driven on the  
RCLK rising edge following the one  
that samples a RADR[4:0] value  
that matches VADR[4:0].  
RSX  
Undefined. It is low when not high  
impedance.  
High coincident with the first word  
of the cell data structure.  
RSOP  
High coincident with the first word  
of the cell data structure.  
High coincident with the second  
word of the cell data structure.  
Paused  
transfers  
Permitted by deasserting RENB  
high, but the S/UNI-VORTEX’s  
address must be presented on  
RADR[4:0] the last cycle RENB is  
high.  
Permitted by deasserting RENB  
high. The cell transfer resumes  
unconditionally when RENB is  
asserted low again.  
Autonomous Not supported. A subsequent cell  
The outputs become high  
deselection  
is output (provided one is available) impedance after the last word of a  
if RENB is held low beyond the end cell is transferred until the S/UNI-  
of a cell.  
VORTEX is reselected.  
The cell format is the same as the downstream interface (Fig. 3). No address  
map manipulation is performed in the upstream direction; ADDR[13:0] field  
encoding has a fixed relationship to the physical ports. ADDR[13:9] will always  
equal the VADR[4:0] input pins’ state. ADDR[8:6] corresponds to the index of the  
high speed serial link (RXD0+/- through RXD7+/-) over which the cell was  
received. ADDR[5:0] presents the logical channel index that had been encoded  
in the cell received on the high-speed serial link. An encoding of “111110” in  
ADDR[5:0] indicates the cell is a control channel cell.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
33  
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