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PM7351-BGI 参数 Datasheet PDF下载

PM7351-BGI图片预览
型号: PM7351-BGI
PDF下载: 下载PDF文件 查看货源
内容描述: [Support Circuit, 1-Func, CMOS, PBGA304, 31 X 31 MM, 1.51 MM HEIGHT, 1.27 MM PITCH, SBGA-304]
分类和应用: ATM异步传输模式电信电信集成电路
文件页数/大小: 174 页 / 1840 K
品牌: PMC [ PMC-SIERRA, INC ]
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RELEASED  
PM7351 S/UNI-VORTEX  
DATA SHEET  
PMC-1980582  
ISSUE 5  
OCTAL SERIAL LINK MULTIPLEXER  
Fig. 3 SCI-PHY/Any-PHY Cell  
Bit 15  
Bit 8 Bit 7  
Bit 0  
W ord 0  
Reserved  
ADDR[13:0]  
User Prepend  
(optional)  
W ord 1  
(optional)  
H1  
H3  
H2  
H4  
W ord 2  
W ord 3  
W ord 4  
1
1
UDF  
H5  
(optional)  
PAYLOAD1  
PAYLOAD3  
PAYLOAD2  
PAYLOAD4  
W ord 5  
W ord 6  
W ord 28  
PAYLOAD47  
PAYLOAD48  
Note 1: Optionally, the H5/UDF fields can be overwritten by ADDR[13:0].  
Format  
9.1.2 Upstream  
In the upstream direction, each S/UNI-VORTEX appears as a single SCI-PHY or  
Any-PHY slave. The traffic from each high-speed serial link (RXD0+/- through  
RXD7+/) is queued independently to support per logical channel flow control  
without head of line blocking. Weighted round robin servicing determines the  
order of cells presented on RDAT[15:0]. Weights are strictly linear. For  
example, compared to a link with a weight of one, a LVDS link with a weight of  
four will on average have four times the number of opportunities to place a cell  
from its receive buffer onto the upstream bus. Each high speed serial link can be  
assigned a weight between 1 and 4. When the state of the RADR[4:0] inputs  
equals the state of the VADR[4:0] pins, the RPA output indicates whether there is  
at least one cell available for transfer from any link.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
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