RELEASED
PM7351 S/UNI-VORTEX
DATA SHEET
PMC-1980582
ISSUE 5
OCTAL SERIAL LINK MULTIPLEXER
3.1 During power-up, the voltage on the BIAS pins must be kept equal to or
greater than the voltage on the VDD pins, to avoid damage to the device.
3.2 The VDD power must be applied before input pins are driven or the input
current per pin be limited to less than the maximum DC input current
specification. (20 mA)
3.3 Analog power supplies (QAVD, CAVD, RAVD, TAVD) must have their
current per pin limited to the maximum latch-up current specification
(100 mA). In operation, the differential voltage measured between AVD
supplies and VDD must be less than 0.5 V. The relative power
sequencing of the multiple AVD power supplies is not important.
3.4 Power down the device in the reverse sequence.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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PMC [ PMC-SIERRA, INC ]
