RELEASED
PM7351 S/UNI-VORTEX
DATA SHEET
PMC-1980582
ISSUE 5
OCTAL SERIAL LINK MULTIPLEXER
8
PIN DESCRIPTION
Ball
Ball
Type No. Function
Name
High Speed LVDS Links
RXD0+
RXD0-
RXD1+
RXD1-
RXD2+
RXD2-
RXD3+
RXD3-
RXD4+
RXD4-
RXD5+
RXD5-
RXD6+
RXD6-
RXD7+
RXD7-
Diff.
LVDS
Input
D3 The high-speed receive data (RXD0+/- - RXD7+/-)
E4 inputs present NRZ data from a serial backplane.
F3
These are truly differential inputs offering superior
G4
common-mode noise rejection. They have sufficient
G3
sensitivity and common-mode range to support LVDS
H4
signals.
L1
These inputs are high-impedance. An external
resistor must be connected between the two pins of a
signal pair to terminate the transmission line. D.C. or
A.C. coupling may be used depending on the
application.
L2
P1
P2
U3
T4
V3
U4
Y3
W4
TXD0+
TXD0-
TXD1+
TXD1-
TXD2+
TXD2-
TXD3+
TXD3-
TXD4+
TXD4-
TXD5+
TXD5-
TXD6+
TXD6-
TXD7+
TXD7-
Diff.
C1 The transmit differential data (TXD0+/- -TXD7+/-)
D2 outputs present NRZ encoded data to a serial
LVDS
Output D1 backplane. These outputs are open drain current
E2 sinks which interface directly with twisted-pair cabling
E1 or board interconnect. D.C. or A.C. coupling may be
F2 used depending on the application.
K1
As current sinks, these outputs must see a 100Ω
K2
reflected impedance between the pins in a signal pair
N1
to produce correct LVDS signal levels.
N2
W1
V2
Y1
W2
AA1
Y2
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
13