RELEASED
PM7351 S/UNI-VORTEX
DATA SHEET
PMC-1980582
ISSUE 5
OCTAL SERIAL LINK MULTIPLEXER
5
BLOCK DIAGRAM
TENB
TADR[11:0]
TDAT[15:0]
TPRTY
Any-PHY
Transmit
Slave
33 Cell
per-PHY
buffer
TXD0+
TXD0-
TSX
TCLK
TPA
Cell
Processor
RXD0+
RXD0-
6 Cell
FIFO
VADR[4:0]
2 Cell
FIFO
RANYPHY
RENB
RADR[4:0]
RDAT[15:0]
RPRTY
4 Cell
FIFO
SCI-PHY/
Any-PHY
Receive
Slave
RSOP
TXD7+
TXD7-
RSX
RCLK
RPA
RXD7+
RXD7-
A[9:0]
RDB
W RB
CSB
Clock
REFCLK
Synthesis
Micro-
Processor
Interface
ALE
INTB
RSTB
TDO
TDI
TCK
TMS
TRSTB
to all
JTAG
Test Access
Port
blocks
D[7:0]
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
9