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PM7350-PI 参数 Datasheet PDF下载

PM7350-PI图片预览
型号: PM7350-PI
PDF下载: 下载PDF文件 查看货源
内容描述: 双串行链路物理层复用器 [DUAL SERIAL LINK PHY MULTIPLEXER]
分类和应用: 复用器ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式
文件页数/大小: 241 页 / 1939 K
品牌: PMC [ PMC-SIERRA, INC ]
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RELEASED  
PM7350 S/UNI-DUPLEX  
DATA SHEET  
PMC-1980581  
ISSUE 5  
DUAL SERIAL LINK PHY MULTIPLEXER  
10  
NORMAL MODE REGISTER DESCRIPTION  
Normal mode registers are used to configure and monitor the operation of the  
S/UNI-DUPLEX. Normal mode registers (as opposed to test mode registers) are  
selected when TRS (A[8]) is low.  
Notes on Normal Mode Register Bits:  
1. Writing values into unused register bits has no effect. However, to ensure  
software compatibility with future, feature-enhanced versions of the product,  
unused register bits must be written with logic zero. Reading back unused bits  
can produce either a logic one or a logic zero; hence, unused register bits should  
be masked off by software when read.  
2. All configuration bits that can be written into can also be read back. This allows  
the processor controlling the S/UNI-DUPLEX to determine the programming  
state of the block.  
3. Writeable normal mode register bits are cleared to logic zero upon reset unless  
otherwise noted.  
4. Writing into read-only normal mode register bit locations does not affect S/UNI-  
DUPLEX operation unless otherwise noted.  
5. Certain register bits are reserved. These bits are associated with megacell  
functions that are unused in this application. To ensure that the S/UNI-DUPLEX  
operates as intended, reserved register bits must only be written with logic zero.  
Similarly, writing to reserved registers should be avoided.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
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