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PM7350-PI 参数 Datasheet PDF下载

PM7350-PI图片预览
型号: PM7350-PI
PDF下载: 下载PDF文件 查看货源
内容描述: 双串行链路物理层复用器 [DUAL SERIAL LINK PHY MULTIPLEXER]
分类和应用: 复用器ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式
文件页数/大小: 241 页 / 1939 K
品牌: PMC [ PMC-SIERRA, INC ]
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RELEASED  
PM7350 S/UNI-DUPLEX  
DATA SHEET  
PMC-1980581  
ISSUE 5  
DUAL SERIAL LINK PHY MULTIPLEXER  
Register 0x01: Master Configuration  
Bit  
Type  
Function  
Default  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
Reserved  
Reserved  
LTXCINV  
LRXCINV  
RESETO  
MINTE  
0
0
0
0
0
0
1
0
RXAUTOSEL  
ACTIVE  
ACTIVE:  
The ACTIVE bit reports and allows the selection of the active high-speed  
serial link. If ACTIVE is logic 0, the cell data and RX8K timing reference are  
extracted from the RXD1+/- serial link. If ACTIVE is logic 1, the cell data and  
RX8K timing reference are extracted from the RXD2+/- serial link.  
The value read reflects the link actually selected. It is either the value written  
if RXAUTOSEL is logic 0, or the selection based on the system prepend  
otherwise.  
The active high-speed serial link can be determined automatically depending  
on the value of the RXAUTOSEL bit. If RXAUTOSEL is set to logic 0, the  
microprocessor selects the active high-speed link by writing to the ACTIVE  
bit. Writing to the ACTIVE bit has no effect if the RXAUTOSEL is logic 1.  
RXAUTOSEL:  
The RXAUTOSEL bit controls the automatic selection of the active high-  
speed serial link. If RXAUTOSEL is logic 1, the DUPLEX switches the active  
link based on the status information extracted from both links.  
.
MINTE:  
The Master Interrupt Enable allows internal interrupt statuses to be  
propagated to the interrupt output. If MINTE is logic 1, INTB will be asserted  
low upon the assertion of an interrupt status bit whose individual enable is  
set. If MINTE is logic 0, INTB is unconditionally high-impedance.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
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