RELEASED
PM7350 S/UNI DUPLEX
DATA SHEET
PMC-1980581
ISSUE 8
DUAL SERIAL LINK PHY MULTIPLEXER
Ball
Name
Ball
No. Function
Type
High Speed LVDS Links
VSS
Ground
B5 The digital ground (VSS) pins should be connected
C3 to GND.
C8
C10
C12
D4
D7
E12
G2
J3
K4
L8
M2
M6
M8
N11
N14
P3
P5
P10
QAVD
QAVS
CAVD
Analog M13 Quiet Analog Power (QAVD). QAVD should be
Power
connected to analog +3.3 V. It should be electrically
isolated (as much as possible) from the other power
connections.
Analog M14 Quiet Analog Ground (QAVS). QAVS should be
Ground
connected to analog GND. It should be electrically
isolated (as much as possible) from the other
ground connections.
Analog
Power
L11 The power (CAVD) pin for the analog clock
synthesis unit. This pin should be connected to
analog +3.3V. It should be electrically isolated (as
much as possible) from the other power
connections.
CAVS
Analog
Ground
L12 The ground (CAVS) pin for the analog clock
synthesis unit. This pin should be connected to
analog GND. It should be electrically isolated (as
much as possible) from the other ground
connections.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
44
PMC [ PMC-SIERRA, INC ]
