RELEASED
PM7350 S/UNI DUPLEX
DATA SHEET
PMC-1980581
ISSUE 8
DUAL SERIAL LINK PHY MULTIPLEXER
3.3 Analog power supplies (QAVD, CAVD, RAVD, TAVD) must be applied
after VDD have been applied or they must be current limited to the
maximum latch-up current specification (100 mA). In operation, the
differential voltage measured between AVD supplies and VDD must be
less than 0.5 V. The relative power sequencing of the multiple AVD
power supplies is not important.
3.4 Power down the device in the reverse sequence.
4. Placing 0.01 uF or 0.001 uF ceramic capacitors close to each power supply
pin is recommended as standard practice.
5. For CAVD (Analog Power), a RC network consisting of a 5 ohm resistor and a
1 uF electrolytic/tantalum capacitor is recommended. A 0.01 uF or 0.001 uF
ceramic capacitor connected in parallel with the 1 uF capacitor is also
suggested.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
46
PMC [ PMC-SIERRA, INC ]
