RELEASED
PM7350 S/UNI DUPLEX
DATA SHEET
PMC-1980581
ISSUE 8
DUAL SERIAL LINK PHY MULTIPLEXER
4. θJB, the junction-to-board thermal resistance, is obtained by simulating conditions described in JEDEC Standard
JESD 51-8 (for more information about this standard, see[7]) and θJT, the junction-to-top thermal resistance, is
obtained by simulating conditions described in SEMI Standard G30-88; for more information about this standard,
see [8]
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
229