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PM7350-PGI 参数 Datasheet PDF下载

PM7350-PGI图片预览
型号: PM7350-PGI
PDF下载: 下载PDF文件 查看货源
内容描述: [Support Circuit, 1-Func, CMOS, PBGA160, 15 X 15 MM, 1.81 MM HEIGHT, PLASTIC, BGA-160]
分类和应用: ATM异步传输模式电信电信集成电路
文件页数/大小: 245 页 / 898 K
品牌: PMC [ PMC-SIERRA, INC ]
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RELEASED  
PM7350 S/UNI DUPLEX  
DATA SHEET  
PMC-1980581  
ISSUE 8  
DUAL SERIAL LINK PHY MULTIPLEXER  
2. When a hold time is specified between an input and a clock, the hold time is the  
time in nanoseconds from the 1.4 Volt point of the clock to the 1.4 Volt point of  
the input.  
Notes on Output Timing:  
1. Output propagation delay time is the time in nanoseconds from the 1.4 Volt point  
of the reference signal to the 1.4 Volt point of the output.  
2. Maximum output propagation delays are measured with a 50 pF load on the  
outputs with the exception of the LTXD[15:0], RX8K, RCLK outputs. The  
LTXD[15:0], RX8K, RCLK output propagation delays are measured with a 20 pF  
load  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
227  
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