S/UNI-IMA-4 Telecom Standard Product Data Sheet
Released
Figure 45 UTOPIA L2 Single-PHY Receive Slave
16-bit Utopia L2 Single Address Slave
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Polling & Reselection
Selection
Back 2 Back Cell
RCLK
RADR[4:0]
1F
DEVID
1F
N+1
1F
DEVID
1F
N+2
1F
N+3
D(2)
1F
N+1
1F
N
1F
N+1
D(3)
1 RCLK
1 RCLK
N+1
D(n)
RCA
RDAT[m:0], RPRTY
RENB
DEVID
DEVID
D(n-3)
D(n-2)
PAUS
D(n-1)
D(0)
D(1)
D(n-1)
D(n)
D(0)
D(1)
D(2)
RSOC
14.3.5 Any-PHY Receive Slave Interface
Figure 46 gives an example of the functional timing of the receive interface when configured as
an Any-PHY compliant receive slave. The interface responds to the polling of address “IMA”
(which matches the address defined by the Receive Any-PHY/UTOPIA Config register) by
asserting RPA when it is capable of delivering a complete cell. The Any-PHY master repolls
addresses until it receives an asserted RPA. As a result, the master re-selects the same RADR
again during the last cycle RENB is high to initiate a transfer. Once transfer is initiated, RENB
must remain asserted until the last data is received.
Figure 46 Any-PHY Receive Slave
1
2
3
4
5
6
7
8
9
10
Polling
Selection
RCLK
RADR[4:0]
RCSB
1F
IMA-AD
1F
PHY-Y
1F
IMA-AD
1F
PHY-Z
1F
PHY-Z PHY-A
2 RCLK
PHY-Y
2 RCLK
IMA-ADR
RPA
PHY-Z
IMA-ADR
PHY-Z
2 RCLK
RDAT[m:0], RPRTY
RENB
IMA Add Data 0 Data 1
RSX
RSOP
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2020889, Issue 2
300