S/UNI-IMA-4 Telecom Standard Product Data Sheet
Released
Register 0x00A: Miscellaneous Interrupt Register
Bit
15:5
4
3
2
Type
R2C
R2C
R2C
R2C
R2C
R2C
Function
Reserved
Default
0
0
0
0
0
0
TC_INTR_FOVR_ERR
SDRAM_CRC_ERR
TX_UTOP_CELLXFERR
TX_UTOP_PAR_ERR
RX_UTOP_XFR_ERR
1
0
This register collects the miscellaneous interrupts. These interrupt bits are cleared on read. If
any bit in this register is set and is enabled, the MISC_INT bit will be set in the Master Interrupt
register.
RX_UTOP_XFR_ERR
When set, it indicates that the Receive Any-PHY/UTOPIA Interface was requested to send a
cell when it did not have one available. This condition is a protocol error in the Receive
Any-PHY/UTOPIA bus. This bit is cleared on read.
0) No protocol error occurred.
1) The Rx Any-PHY/UTOPIA interface was requested to send a cell when a cell was not
available.
TX_UTOP_PAR_ERR
When set, it indicates that the Transmit ANY-PHY/UTOPIA Interface experienced a parity
error. This bit is cleared on read.
0) No parity error occurred on the TX ANY-PHY/UTOPIA interface.
1) A parity error occurred on the TX ANY-PHY/UTOPIA interface.
TX_UTOP_CELLXFERR
When set, it indicates that the Transmit ANY-PHY/UTOPIA Interface experienced a second
TSX asserted prior to a complete cell being transferred. This indicates that a runt cell has
been transferred to the S/UNI-IMA-4; this is protocol violation. Also, in AnyPHY mode,
this interrupt signal will be triggered if the TENB is deasserted prior to a complete cell is
transferred since pausing is not supported in Any-PHY mode.
0) No cell transfer error occurred on the TX ANY-PHY/UTOPIA interface.
1) A cell transfer error occurred on the TX ANY-PHY/UTOPIA interface.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2020889, Issue 2
103