Released
Datasheet
PM73487 QRT
PMC-Sierra, Inc.
PMC-980618
Issue 3
622 Mbps ATM Traffic Management Device
6 TIMING DIAGRAMS
All pin names are described in section 4 “Pin Descriptions” starting on page 55. Unless otherwise
indicated, all output timing delays assume a capacitive loading of 30 pF
6.1 UTOPIA Timing
Figure 50 shows the receive UTOPIA 50 MHz timing (the RATM_ADD and RATM_CLAV val-
ues are shown in hexadecimal).
1
2
3
4
5
6
7
8
9
10
11
12
ATM_CLK
Trdath
Trdatasu
RATM_DATA(15:0)
RATM_ADD(4:0)
/RATM_READ_EN
h
h
h
p
p
p
p
p
p
TraddQ
1F
01
00
1F
01
1F
TrenQ
Trclavh
Trclavsu
RATM_CLAV(3:0)
RATM_SOC
1
0
1
0
1
0
Trsocsu
Figure 50. Receive UTOPIA 50 MHz Timing
Symbol
Parameter
Signals
Min
Max
Unit
ATM_CLK frequency
ATM_CLK duty cycle
Clock-to-output valid time
ATM_CLK
ATM_CLK
55
60
MHz
%
40
3.4
4
TraddQ
RATM_ADD(4:0)
RATM_CLAV(3:0)
RATM_CLAV(3:0)
/RATM_READ_EN
RATM_SOC
10.5
ns
Trclavsu Input setup time
ns
Trclavh
TrenQ
Input hold time
1
ns
Clock-to-output valid time
Input setup time
3.5
4
9.5
ns
Trsocsu
ns
Trdatasu Input setup time
Trdath Input hold time
RATM_DATA(15:0)
RATM_DATA(15:0)
4
ns
1
ns
77
PMC [ PMC-SIERRA, INC ]
