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PM73487 参数 Datasheet PDF下载

PM73487图片预览
型号: PM73487
PDF下载: 下载PDF文件 查看货源
内容描述: 622 Mbps的ATM流量管理设备 [622 Mbps ATM Traffic Management Device]
分类和应用: 异步传输模式ATM
文件页数/大小: 251 页 / 2936 K
品牌: PMC [ PMC-SIERRA, INC ]
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Released  
Datasheet  
PM73487 QRT  
PMC-Sierra, Inc.  
PMC-980618  
Issue 3  
622 Mbps ATM Traffic Management Device  
4.3.9 UTOPIA ATM Layer Interface Signals  
4.3.9.1 Transmit UTOPIA ATM Layer Interface Signals  
Table 16. Transmit UTOPIA ATM Layer Interface Signals (29 Pins)  
Drive/Input Slew  
Signal Name  
Ball  
Type  
Description  
Level  
Rate  
ATM_CLK  
V27  
In  
CMOS  
UTOPIA ATM Layer Clock provides  
timing information for both the transmit  
and receive UTOPIA interfaces.  
TATM_ADD(4:0)  
AH19, AG17, AF18,  
AJ17, AG18  
Out  
Out  
12 ma  
12 ma  
Mod Transmit UTOPIA ATM Layer Address  
Bits 4 to 0.  
TATM_DATA(15:0)  
AH17, AH16, AF16,  
AG16, AE16, AH15,  
AE15, AF15, AG15, AJ13,  
AH13, AH14, AG13,  
AG14, AF13, AH12  
Mod Transmit UTOPIA ATM Layer Data  
Bits 15 to 0 are part of the 16-bit UTO-  
PIA transmit data bus that carries data  
toward the PHY layer device.  
TATM_CLAV(3:0)  
AH11, AF14, AG12, AF12  
In  
5 V or  
LV TTL  
Transmit UTOPIA ATM Layer Cell  
Available Bits 3 to 0 are active high sig-  
nals that indicate the selected PHY  
layer devices may accept another cell.  
TATM_SOC  
AE12  
AE14  
AE13  
Out  
Out  
Out  
12 ma  
12 ma  
12 ma  
Mod Transmit UTOPIA ATM Layer Start-  
Of-Cell marks the start of a cell.  
/TATM_WRITE_EN  
TATM_PARITY  
Mod Transmit UTOPIA ATM Layer Write  
Enable enables the write of a cell byte.  
Mod Transmit UTOPIA ATM Layer Odd  
Parity bit over TATM_DATA(15:0).  
4.3.9.2 Receive UTOPIA ATM Layer Interface Signals  
Table 17. Receive UTOPIA ATM Layer Interface Signals (27 Pins)  
Drive/  
Input Level  
Slew  
Rate  
Signal Name  
Ball  
Type  
Description  
RATM_ADD(4:0)  
C19, C21, B21, E20,  
D19  
Out  
12 ma  
Mod Receive UTOPIA ATM Layer Address  
Bits 4 to 0  
RATM_DATA(15:0) D15, A17, B17, C17,  
B18, D17, C16, B20,  
In  
5V or LV  
TTL  
Receive UTOPIA ATM Layer Data Bits  
15 to 0 are part of the 16-bit UTOPIA  
receive data bus that carries data from  
the PHY layer device.  
B19, D16, D18, C18,  
E18, E16, E17, B22  
RATM_SOC  
D21  
In  
In  
5V or LV  
TTL  
Receive UTOPIA ATM Layer Start-Of-  
Cell marks the start of a cell.  
RATM_CLAV(3:0)  
C22, E19, A24, D20  
5V or LV  
TTL  
Receive UTOPIA ATM Layer Cell  
Available Bits 0 to 3 indicate the  
selected PHY layer devices have  
another cell.  
/RATM_READ_EN  
C20  
Out  
12 ma  
Mod Receive UTOPIA ATM Layer Read  
Enable causes a read from the FIFO in  
the PHY layer device.  
72  
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