Released
Datasheet
PM73487 QRT
PMC-Sierra, Inc.
PMC-980618
Issue 3
622 Mbps ATM Traffic Management Device
Table 15. Transmit Cell Buffers RAM Interface Signals (48 Pins) (Continued)
Drive/
Input Level
Slew
Rate
Signal Name
/TX_DRAM_WE
Ball
Type
Description
AE19
Out
5 ma
Mod Transmit DRAM Write Enable
is an active low signal that
enables a write into the syn-
chronous DRAM.
NOTE: DQM (I/O mask enables) pins to the SGRAM or SDRAM need to be tied to logic 0.
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