Released
Datasheet
PM73487 QRT
PMC-Sierra, Inc.
PMC-980618
Issue 3
622 Mbps ATM Traffic Management Device
7.2.4 SRAM_CONFIG
Address: 3h (Ch byte)
Type: Read/Write
Format: Refer to the following table.
Field (Bits)
Description
Write with a 0 to maintain software compatibility with future versions.
Not used
(31:24)
RX_DRAM_TYPE
(23)
1
Using 1M × 16 SDRAM or 1M x 32 SGRAM devices. For the function of /
RX_DRAM_CS(1:0), refer to
“/RX_DRAM_CS(1:0)” on page 69. .
0
1
Using 256K × 32 SGRAM devices.
TX_DRAM_TYPE
(22)
Using 1M × 16 SDRAM or 1M x 32 SGRAM devices. For the function of /
TX_DRAM_CS(1:0), refer to
“/TX_DRAM_CS(1:0)” on page 70.
0
Using 256K × 32 SGRAM devices.
Not used
(21:14)
Write with a 0 to maintain software compatibility with future versions.
NUM_VI
(13:12)
Defines the number of Virtual Input (VI) bits to use to determine the index into the VI_VPI_TABLE
(refer to section 9.2.1 “VI_VPI_TABLE” starting on page 175) as part of the channel lookup.
0h
1h
2h
Use zero VI bits. Use only the VP bits in the calculation for the VI_VPI_TABLE. Only
UTOPIA address 0 may be used in this mode.
Use two VI bits (1:0) as the two MSBs in the calculation of the index for the
VI_VPI_TABLE. Only UTOPIA addresses 0-3 may be used in this mode.
Use five VI bits (4:0) as the five MSBs in the calculation of the index for the
VI_VPI_TABLE. Any of the 31 UTOPIA addresses may be used in this mode.
Not defined.
3h
Resets to 0h.
ALRAM_TYPE
(11)
1
Using the Single Cycle Deselect (SCD) type SSRAM for ALRAM with
ALRAM_CONFIG = 3. Note: This is only valid when the ALRAM is populated with 2
chips of 256K x 18 type.
0
Using the Double Cycle Deselect (DCD) type SSRAM for ALRAM
Resets to 0h
Not used
(10)
Write with a 0 to maintain software compatibility with future versions.
104
PMC [ PMC-SIERRA, INC ]
