RELEASED
PM73123 AAL1GATOR-8
DATASHEET
PMC-2000097
ISSUE 2
8 LINK CES/DBCES AAL1 SAR
9.2.1.1.4.3Pattern Match Idle Detection
Pattern match idle detection compares the received byte with a programmed
pattern and a mask. If there is a mismatch of received data with the
programmed pattern during a programmable length of time, then the channel is
considered active. Otherwise, if the received channel bytes match the
unmasked pattern bits over the programmable length of time, the channel is
considered in an idle state and cell transmission will be suppressed.
Interval length refers to the amount of time that the patterns must match for it to
be considered a match event. This value is programmed in the Pattern Matching
Line Configuration register for the associated line. The Interval length is
programmed in units of 12 ms for T1 and units of 16 ms for E1. Since this is an
8 bit field, the maximum length of time is 3.1 (+/- 12 ms) seconds for T1 and 4.1
(+/- 16 ms) seconds for E1.
Figure 27 PAT_MTCH_CFG Register Structure
15
8
7
0
Rsvd
Interval Length
Internal Length = Duration of time data must
match before declaring an idle condition
Figure 28 shows the structure of the AUTO_CONFIG_n field in the CAS/Pattern
Matching Configuration Table. The lower byte contains the pattern the received
byte should be compared against. The upper byte is a mask field that can be
used to control which bits are monitored. Since the chip will be updating this
field during normal operation, it is best if the processor writes to the lower byte of
the register only during reset in order to avoid contention. .
PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL
88
PMC [ PMC-SIERRA, INC ]
