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PM73121-RI 参数 Datasheet PDF下载

PM73121-RI图片预览
型号: PM73121-RI
PDF下载: 下载PDF文件 查看货源
内容描述: AAL1分段重组处理器 [AAL1 Segmentation And Reassembly Processor]
分类和应用: ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式
文件页数/大小: 223 页 / 2148 K
品牌: PMC [ PMC-SIERRA, INC ]
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PM73121AAL1gator II  
Data Sheet  
PMC-Sierra, Inc.  
PMC-980620  
,VVXHꢀꢁ  
AAL1 SAR Processor  
Table 25. Memory Interface System Clock Operating Conditions (Continued)  
SRTS_DOUT  
(Binary)  
8-Bit DAC Code  
(Hex)  
0100  
0011  
0010  
0001  
0000  
1111  
1110  
1101  
1100  
1011  
1010  
1001  
1000  
XXXX  
B3  
A6  
9A  
8D  
80  
73  
66  
5A  
4D  
40  
33  
26  
19  
80  
Typically, SRTS nibbles delivered by the AAL1gator II oscillate between two values, such as  
1100b and 1011b. To smooth out the resulting clock jitter, a more sophisticated mapping from  
SRTS nibbles to 8-bit DAC codes can be used. Some examples of such mappings are averages  
and running averages that access a lookup table with finer resolution than that provided by the  
SRTS nibbles.  
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