PM73121ꢀAAL1gator II
Data Sheet
PMC-Sierra, Inc.
PMC-980620
,VVXHꢀꢁ
AAL1 SAR Processor
Symbol
Parameter
Signals
Min
Max
Unit
Tres
Reset assertion time /RESET
Minimum /RESET pulse width must be more
than three clock times of the slowest active
RL_CLK, active TL_CLK, or SYS_CLK.
Trec
Reset recovery time /RESET
Minimum /RESET recovery time must be more
than three clock times of the slowest active
RL_CLK, active TL_CLK, or SYS_CLK.
6.8.3 JTAG Timing
Figure 82 provides timing information regarding the JTAG port.
Tjres
Tcl
SCAN_TRSTN(i)
Fc
Tch
Tjsu
Tjh
SCAN_TCLK(i)
SCAN_TMS(i)
SCAN_TDI(i)
Tqj
Tqj
SCAN_TDO(o)
Figure 82. JTAG Timing
Signals
Symbol
Parameter
Min
Max
Unit
Fc
Tch
Tcl
SCAN_TCLK frequency
SCAN_TCLK high period
SCAN_TCLK low period
SCAN_TCLK hold time
/SCAN_TRST low
SCAN_TCLK
5
MHz
ns
SCAN_TCLK
80
80
40
80
40
2
SCAN_TCLK
ns
Tjh
SCAN_TMS, SCAN_TDI
/SCAN_TRST
ns
Tjres
Tjsu
Tqj
ns
SCAN_TCLK setup time
SCAN_TMS, SCAN_TDI
SCAN_TDO
ns
SCAN_TCLK-to-output delay
/SCAN_TRST-to-output delay
40
ns
ꢀꢁꢉ