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PM73121-RI 参数 Datasheet PDF下载

PM73121-RI图片预览
型号: PM73121-RI
PDF下载: 下载PDF文件 查看货源
内容描述: AAL1分段重组处理器 [AAL1 Segmentation And Reassembly Processor]
分类和应用: ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式
文件页数/大小: 223 页 / 2148 K
品牌: PMC [ PMC-SIERRA, INC ]
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PM73121AAL1gator II  
Data Sheet  
PMC-Sierra, Inc.  
PMC-980620  
,VVXHꢀꢁ  
AAL1 SAR Processor  
Symbol  
Parameter  
Signals  
Min  
Max  
Unit  
Tres  
Reset assertion time /RESET  
Minimum /RESET pulse width must be more  
than three clock times of the slowest active  
RL_CLK, active TL_CLK, or SYS_CLK.  
Trec  
Reset recovery time /RESET  
Minimum /RESET recovery time must be more  
than three clock times of the slowest active  
RL_CLK, active TL_CLK, or SYS_CLK.  
6.8.3 JTAG Timing  
Figure 82 provides timing information regarding the JTAG port.  
Tjres  
Tcl  
SCAN_TRSTN(i)  
Fc  
Tch  
Tjsu  
Tjh  
SCAN_TCLK(i)  
SCAN_TMS(i)  
SCAN_TDI(i)  
Tqj  
Tqj  
SCAN_TDO(o)  
Figure 82. JTAG Timing  
Signals  
Symbol  
Parameter  
Min  
Max  
Unit  
Fc  
Tch  
Tcl  
SCAN_TCLK frequency  
SCAN_TCLK high period  
SCAN_TCLK low period  
SCAN_TCLK hold time  
/SCAN_TRST low  
SCAN_TCLK  
5
MHz  
ns  
SCAN_TCLK  
80  
80  
40  
80  
40  
2
SCAN_TCLK  
ns  
Tjh  
SCAN_TMS, SCAN_TDI  
/SCAN_TRST  
ns  
Tjres  
Tjsu  
Tqj  
ns  
SCAN_TCLK setup time  
SCAN_TMS, SCAN_TDI  
SCAN_TDO  
ns  
SCAN_TCLK-to-output delay  
/SCAN_TRST-to-output delay  
40  
ns  
ꢀꢁꢉ  
 
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