PM6341 E1XC
DATA SHEET
PMC-910419
ISSUE 8
E1 FRAMER/TRANSCEIVER
Register 10H: CDRC Block Configuration
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
AMI
LOS1
0
0
0
0
0
0
0
X
LOS0
DCR
Reserved
ALGSEL
O162
Unused
AMI:
The active high AMI bit disables HDB3 decoding. With AMI low, an HDB3
signature on the RP and RN inputs is substituted with four zeros on the
DRPCM output.The AMI bit has no affect on the RPCM output.
LOS1, LOS0
The loss of signal threshold is set by the state of the AMI, LOS1 and LOS0
bits:
AMI
LOS1
LOS0
Threshold (PCM periods)
0
1
0
0
0
1
1
0
0
1
0
1
10
15
X
X
X
31
63
175
If the number of consecutive spaces exceeds the programmed threshold, loss
of signal is declared.
DCR:
Asserting the DCR bit disables clock recovery. With DCR high, the recovered
clock (RCLKO) is derived from RCLKI instead of being recovered from the
RDP and RDN inputs.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
102
PMC [ PMC-SIERRA, INC ]
