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PM6341-QI 参数 Datasheet PDF下载

PM6341-QI图片预览
型号: PM6341-QI
PDF下载: 下载PDF文件 查看货源
内容描述: E1成帧器/收发器 [E1 FRAMER/TRANSCEIVER]
分类和应用: PC
文件页数/大小: 272 页 / 902 K
品牌: PMC [ PMC-SIERRA, INC ]
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PM6341 E1XC  
DATA SHEET  
PMC-910419  
ISSUE 8  
E1 FRAMER/TRANSCEIVER  
Register 0EH: E1XC Phase Status Word (LSB)  
Bit  
Type  
Function  
Default  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
R
R
R
R
R
R
R
R
PSB[7]  
PSB[6]  
PSB[5]  
PSB[4]  
PSB[3]  
PSB[2]  
PSB[1]  
PSB[0]  
X
X
X
X
X
X
X
X
This register contains the least significant byte, PSB[7:0], of the 9-bit phase  
status word.The 9-bit phase status word indicates the relative phase difference  
between the received E-1 line timing (available on RCLKO) and system timing.  
By utilizing the value of the phase status word, the system timing can be locked  
to the receive line timing via an external software controlled phase-locked-loop.  
The least significant 8 bits contained in this register indicate a count value (0-  
255) of the number of system backplane clock cycles between successive 125µs  
frame pulses.The most significant 5 bits (PSB[7:3]) represent a time slot number  
(0-31) and the least significant 3 bits (PSB[2:0]) represent the bit number within  
the timeslot (0-7). The count value corresponds to the location within the system  
frame where the receive line-timed frame pulse occurred. If the received line  
clock frequency is higher on average than the system clock frequency, the phase  
status word value will be seen to decrease during successive register reads. If  
the received line clock frequency is lower on average than the system clock  
frequency, the phase status word value will be seen to increase during  
successive register reads.  
The 9th bit of the Phase Status Word indicates the "frame count" and will toggle  
when two successive 8-bit counter values straddle a frame boundary.The  
PSB[8] bit will toggle when the bit and timeslot count indicated by PSB[7:0]  
exceeds timeslot 31, bit 7 or the count goes below timeslot 0, bit 0. This is  
determined by comparing the PSB[7:6] bits of the current phase status word  
value to those of the previous word value; PSB[8] is toggled only under the  
following conditions (all other bit value transitions leave PSB[8] unchanged):  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
99  
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