PM6341 E1XC
DATA SHEET
PMC-910419
ISSUE 8
E1 FRAMER/TRANSCEIVER
logic 1, the diagnostic digital loopback mode is enabled. When DDLB is set to
logic 0, the diagnostic digital loopback mode is disabled.
DMLB:
The DMLB bit enables the diagnostic metallic loopback mode, where the
digital, RZ positive and negative sliced versions of the analog signals output
on the TAP and TAN pins from XPLS are internally connected to the receive
positive and negative pulse inputs of CDRC. When DMLB is set to logic 1,
the diagnostic metallic loopback mode is enabled. When DMLB is set to logic
0, the diagnostic metallic loopback mode is disabled.
Upon reset of the E1XC, these register bits are cleared to zero.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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PMC [ PMC-SIERRA, INC ]
