PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
Register 0080H: TRMP Configuration
Bit
Type
Function
Default
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Unused
Unused
Unused
Unused
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
LREIBLK
LREIEN
APSEN
0
1
1
1
1
0
1
1
1
0
0
1
Bit 8
Reserved
TLDEN
Bit 7
Bit 6
Reserved
Reserved
TSLDEN
TRACEEN
J0Z0INCEN
Z0DEF
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
A1A2EN
A1A2EN:
The A1A2 framing enable (A1A2EN) bit controls the insertion of the framing bytes in the data
stream. When A1A2EN is set to logic 1, F6h and 28h are inserted in the A1 and A2 bytes
according to the priority of Table 4. When A1A2EN is set to logic 0, the framing bytes are not
inserted.
For normal operation, the A1A2EN bits in the TRMP Aux1 Configuration register, the TRMP
Aux2 Configuration register and the TRMP Aux3 Configuration register must be set to the
same value as the A1A2EN bit.
Z0DEF:
The Z0 definition (Z0DEF) bit defines the Z0 growth bytes. When Z0DEF is set to logic 1, the
Z0 bytes are defined according to ITU. The Z0 bytes are located in STS-1/STM-0 #2 to #12.
When Z0DEF is set to logic 0, the Z0 bytes are defined according to BELLCORE. The Z0
bytes are located in STS-1/STM-0 #2 to #48.
For normal operation, the Z0DEF bits in the TRMP Aux1 Configuration register, the TRMP
Aux2 Configuration register and the TRMP Aux3 Configuration register must be set to the
same value as the Z0DEF bit.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
150
PMC [ PMC-SIERRA, INC ]
