PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
RX2488_ENABLE:
The 2.488GHz Receiver Enable provides a global power down of the RX2488 Analog Block
Circuit. When set to ‘0’ this bit forces the ABC to a low power state and functionality is
disabled. When set to ‘1’ the ABC operates in the normal mode of operation.
CSU_RESET:
The Clock Source Unit Reset provides a complete reset of the CRU Analog Block Circuit.
When set to ‘0’ this bit forces the ABC to a known initial state. While the bit is set to ‘1’ the
functionality of the block is disabled. When set to ‘0’ the ABC operates in the normal mode of
operation. This bit is not self-clearing. Therefore a ‘0’ must writing to the bit to remove the
reset condition.
CRU_RESET:
The Clock Recovery Unit Reset provides a complete reset of the CRU Analog Block Circuit.
When set to ‘0’ this bit forces the ABC to a known initial state. While the bit is set to ‘1’ the
functionality of the block is disabled. When set to ‘0’ the ABC operates in the normal mode of
operation. This bit is not self-clearing. Therefore a ‘0’ must writing to the bit to remove the
reset condition.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
124
PMC [ PMC-SIERRA, INC ]
