S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Released
10.19.2BIP-8 Insert
The BIP-8 calculation is based on the scrambled data of the complete APS frame. The section
BIP-8 code is based on a bit interleaved parity calculation using even parity. Details are
provided in the references. The calculated BIP-8 code is then inserted into the B1 byte of the
following frame before scrambling. BIP-8 errors may be continuously inserted under register
control for diagnostic purposes.
10.19.3Framing and Identity Insert
The Framing and Identity Insert Block inserts the framing bytes (A1, A2) into the APS frame.
Framing bit errors may be continuously inserted under register control for diagnostic purposes.
10.19.4Scrambler
The Scrambler Block utilizes a frame synchronous scrambler to process the transmit stream
when enabled through an internal register accessed via the microprocessor interface. The
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generating polynomial is x + x + 1. Precise details of the scrambling operation are provided
in the references. Note that the framing bytes are not scrambled. All zeros may be continuously
inserted (after scrambling) under register control for diagnostic purposes.
10.20 SONET/SDH Path Aligner
The SONET/SDH Path Aligner (STAL) synchronizes the transmit APS path data streams to the
CSU transmit clock domain. All APS bit serial interfaces are transmitted using the synthesized
622.08 MHz clock from the CSU and require all APS path data streams to be aligned to this
clock domain.
Frequency offsets (due to receive path information) and phase differences (due to normal
network operation) between a channel’s path stream and the APS stream are accommodated by
pointer adjustments on the APS stream. The alignment is accomplished by recalculating the
SONET/SDH payload pointer value based on the offset between transport overhead of the path
data stream and the outgoing APS data stream.
Since each STAL only processes a STS-1/STM-0 pointer, each APS interface uses four master
STAL blocks to process the four concatenated payload pointers and 8 other slave STAL blocks
to handle the remaining STS-3c/STM-1 data streams.
10.21 Receive APS Interface
The Receive APS interface (RAPS) allows two S/UNI-8x155 devices to exchange SONET/SDH
path data streams. The receive interface accepts a SONET/SDH serial data stream with valid
section and path overheads ignoring all line overhead information. This allows performance
monitoring and alarm generation to be done in a similar manner to the serial line side interfaces.
The APS path information may be terminated by the receive side of a channel
(RPOP/RXCP/RXFP/RUL3) or inserted into the transmit side of a channel (TSOP/TLOP).
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
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PMC [ PMC-SIERRA, INC ]
