S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Released
Register 0x1001: S/UNI-8x155 DCC Interface Configuration
Bit
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
DCCSEL[7]
DCCSEL[6]
DCCSEL[5]
DCCSEL[4]
DCCSEL[3]
DCCSEL[2]
DCCSEL[1]
DCCSEL[0]
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0
0
0
0
0
0
0
This register configures the DCC interfaces for section or line DCC operation for each channel.
DCCSEL[7:0]:
The DCC mode select determines if the DCC interfaces (RDCC[7:0] and TDCC[7:0]) are
configured for section or line DCC operation. When DCCSEL[x] is high, the
associated channel DCC interface is configured for section DCC. When
DCCSEL[x] is low, the associated channel DCC interface is configured for line
DCC.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
304
PMC [ PMC-SIERRA, INC ]
