S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Released
Register 0x0C0, 0x1C0, 0x2C0, 0x3C0, 0x4C0, 0x5C0, 0x6C0, 0x7C0:
TXFP Interrupt Enable/Status
Bit
Type
R/W
R
R/W
R
R/W
R
R/W
R
Function
Reserved
Reserved
FUDRE
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
X
0
X
0
X
0
X
FUDRI
Reserved
Reserved
Reserved
Reserved
FUDRI:
The FUDRI bit is set high when the channel buffer underruns while reading a packet data
from the buffer. This bit is reset immediately after a read to this register. When TXFP
underruns, the programmed TIL[3:0] is not adhered to, hence it is recommanded that upon
detection of TXFP underrun the violating Level2 and Level3 channel FIFOs be reset.
FUDRE:
The FUDRE bit enables the generation of an interrupt due to a channel buffer underrun.
When FUDRE is set to logic one, the interrupt is enabled and cause FUDRI and the output
INTB to be asserted. When set to logic zero, FUDRI will be asserted, but not INTB.
Reserved:
The reserved bits must be programmed to logic zero for proper operation.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
263
PMC [ PMC-SIERRA, INC ]
