PM5363 TUPP+622
TUPP+622
DATASHEET
PMC-1981421
ISSUE 4
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S
INTERFACES
Register 13AH, 23AH, 33AH: RTOP, TU3 or TU #1 in TUG2 #1 to TUG2 #7,
PSLU Interrupt
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
PSLU7I
PSLU6I
PSLU5I
PSLU4I
PSLU3I
PSLU2I
PSLU1I
X
0
0
0
0
0
0
0
R
R
R
R
R
R
R
This register is used to identify and acknowledge path signal label unstable
interrupts for the tributaries TU #1 in TUG2 #1 to TUG2 #7. It is also used to
identify and acknowledge TU3 path signal label unstable interrupts.
PSLU1I:
The PSLU1I bit identifies the source of path signal label unstable interrupts. In
TU3 mode, the PSLU1I bit reports and acknowledges PSLU interrupts of the
TU3 stream. Out of TU3 mode, the PSLU1I bit reports and acknowledges
PSLU interrupt of TU #1 in TUG2 #1. Interrupts are generated when the
received PSL becomes unstable or returns to stable. The PSLU1I bit is set
high when a change of in the PSL unstable state occurs and are cleared
immediately following a read of this register, which also acknowledges and
clears the interrupt. PSLU1I remains valid when interrupts are not enabled
(PSLUE set low) and may be polled to detect path signal label stable/unstable
events.
PSLU2I-PSLU7I:
The PSLU2I to PSLU7I bits identify the source of path signal label mismatch
interrupts. PSLU2I to PSLU7I bits report and acknowledge PSLU interrupt of
TU #1 in TUG2 #2 to TUG2 #7, respectively. Interrupts are generated when
the received PSL becomes unstable or returns to stable. An PSLUxI bit is set
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
233
PMC [ PMC-SIERRA, INC ]
