PM5363 TUPP+622
TUPP+622
DATASHEET
PMC-1981421
ISSUE 4
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S
INTERFACES
Register 13BH, 23BH, 33BH: RTOP, TU3 or TU #1 in TUG2 #1 to TUG2 #7,
RDI Interrupt
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
RDI7I
RDI6I
RDI5I
RDI4I
RDI3I
RDI2I
RDI1I
X
0
0
0
0
0
0
0
R
R
R
R
R
R
R
This register is used to identify and acknowledge remote defect indication
interrupts for the tributaries TU #1 in TUG2 #1 to TUG2 #7. It is also used to
identify and acknowledge TU3 remote defect indication interrupts.
RDI1I:
The RDI1I bit identify the source of remote defect indication interrupts. In TU3
mode, the RDI1I bit reports and acknowledges RDI interrupt of the TU3
stream. Out of TU3 mode, the RDI1I bit reports and acknowledges RDI
interrupt of TU #1 in TUG2 #1. Interrupts are generated when the received
RDI state changes. The RDI1I bit is set high when a change of RDI state
event occurs and are cleared immediately following a read of this register,
which also acknowledges and clears the interrupt. RDI1I remains valid when
interrupts are not enabled (RDIE set low) and may be polled to detect change
of remote defect indication events.
RDI2I-RDI7I:
The RDI2I to RDI7I bits identify the source of remote defect indication
interrupts. In TU3 mode, these bits are unused and will return a logic 0 when
read. Out of TU3 mode, the RDI2I to RDI7I bits report and acknowledge RDI
interrupt of TU #1 in TUG2 #2 to TUG2 #7, respectively. Interrupts are
generated when the received RDI state changes. An RDIxI bit is set high
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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