PM5363 TUPP+622
TUPP+622
DATASHEET
PMC-1981421
ISSUE 4
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S
INTERFACES
set high when a change of PSL event on the associated tributary (TU #1 in
TUG2 #x) occurs and are cleared immediately following a read of this register,
which also acknowledges and clears the interrupt. COPSLxI remains valid
when interrupts are not enabled (COPSLE set low) and may be polled to
detect change of path signal label events.
Reserved:
The Reserved bit must be written with a logic 0 for proper operation of the
TUPP+622.
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230