PM5363 TUPP+622
TUPP+622
DATASHEET
PMC-1981421
ISSUE 4
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S
INTERFACES
Register 139H, 239H, 339H: RTOP, TU3 or TU #1 in TUG2 #1 to TUG2 #7,
PSLM Interrupt
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
PSLM7I
PSLM6I
PSLM5I
PSLM4I
PSLM3I
PSLM2I
PSLM1I
X
0
0
0
0
0
0
0
R
R
R
R
R
R
R
This register is used to identify and acknowledge path signal label mismatch
interrupts for the tributaries TU #1 in TUG2 #1 to TUG2 #7. It is also used to
identify and acknowledge TU3 path signal label mismatch interrupts.
PSLM1I:
The PSLM1I bit identifies the source of path signal label mismatch interrupts.
In TU3 mode, the PSLM1I bit reports and acknowledges PSLM interrupts of
the TU3 stream. Out of TU3 mode, the PSLM1I bit reports and acknowledges
PSLM interrupt of TU #1 in TUG2 #1. Interrupts are generated when the
accepted PSL becomes matched to the expected PSL or becomes
mismatched to the expected PSL. The PSLM1I bit is set high when a change
of in the PSL matched state occurs and are cleared immediately following a
read of this register, which also acknowledges and clears the interrupt.
PSLM1I remains valid when interrupts are not enabled (PSLME set low) and
may be polled to detect path signal label match/mismatch events.
PSLM1I-PSLM7I:
The PSLM1I to PSLM7I bits identify the source of path signal label mismatch
interrupts. In TU3 mode, these bits are unused and will return a logic 0 when
read. Out of TU3 mode, PSLM2I to PSLM7I bits report and acknowledge
PSLM interrupt of TU #1 in TUG2 #2 to TUG2 #7, respectively. Interrupts are
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
231
PMC [ PMC-SIERRA, INC ]
