PM4341AT1XC
DATA SHEET
PMC-900602
ISSUE 7
T1 FRAMER/TRANSCEIVER
8.23 Digital Jitter Attenuator (DJAT)
The Digital Jitter Attenuation function is provided by the DJAT block.This block
receives jittery, dual-rail T1 data in NRZ format from XBAS on two separate
inputs, which allows bipolar violations to pass through the block uncorrected.The
incoming data streams are stored in a FIFO timed to the transmit clock (either
BTCLK or RCLKO).The respective input data emerges from the FIFO timed to
the jitter attenuated clock (TCLKO) referenced to either TCLKI, BTCLK, or
RCLKO.
The jitter attenuator generates the jitter-free 1.544 MHz TCLKO output transmit
clock by adaptively dividing the 37.056 MHz XCLK signal according to the phase
difference between the generated TCLKO and input data clock to DJAT (either
BTCLK or RCLKO). Jitter fluctuations in the phase of the input data clock are
attenuated by the phase-locked loop within DJAT so that the frequency of TCLKO
is equal to the average frequency of the input data clock. To best fit the jitter
attenuation transfer function recommended by TR 62411, phase fluctuations with
a jitter frequency above 6.6 Hz are attenuated by 6 dB per octave of jitter
frequency. Wandering phase fluctuations with frequencies below 6.6 Hz are
tracked by the generated TCLKO. To provide a smooth flow of data out of DJAT,
TCLKO is used to read data out of the FIFO.
If the FIFO read pointer (timed to TCLKO) comes within one bit of the write
pointer (timed to the input data clock, BTCLK or RCLKO), DJAT will track the jitter
of the input clock.This permits the phase jitter to pass through unattenuated,
inhibiting the loss of data.
8.23.1 Jitter Characteristics
The DJAT Block provides excellent jitter tolerance and jitter attenuation while
generating minimal residual jitter. It can accommodate up to 28 UIpp of input
jitter at jitter frequencies above 6 Hz. For jitter frequencies below 6 Hz, more
correctly called wander, the tolerance increases 20 dB per decade. In most
applications the DJAT Block will limit jitter tolerance at lower jitter frequencies
only. For high frequency jitter, above 10 kHz for example, other factors such as
clock and data recovery circuitry may limit jitter tolerance and must be
considered. For low frequency wander, below 10 Hz for example, other factors
such as slip buffer hysteresis may limit wander tolerance and must be
considered. The DJAT block meets the stringent low frequency jitter tolerance
requirements of AT&T TR 62411 and thus allows compliance with this standard
and the other less stringent jitter tolerance standards cited in the references.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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PMC [ PMC-SIERRA, INC ]
