PM4341AT1XC
DATA SHEET
PMC-900602
ISSUE 7
T1 FRAMER/TRANSCEIVER
Pin
Pin No.
Name
INTB
Type
PQFP PLCC Function
Output 4
12
Active low open-drain Interrupt signal
(INTB). This signal goes low when an
unmasked interrupt event is detected on
any of the internal interrupt sources,
including the internal HDLC transceiver.
Note that INTB will remain low until all
active, unmasked interrupt sources are
acknowledged at their source.
CSB
Input
2
10
Active low chip select (CSB).This signal
must be low to enable T1XC register
accesses. CSB must go high at least
once after a powerup to clear internal
test modes. If CSB is not used, then it
should be tied to an inverted version of
RSTB, in which case RDB and WRB
determine register access.
D[0]
D[1]
D[2]
D[3]
D[4]
D[5]
D[6]
D[7]
RDB
I/O
5
13
14
15
16
21
22
23
24
25
Bidirectional data bus (D[7:0]).This bus is
used during T1XC read and write
accesses.
6
7
8
13
14
15
16
17
Input
Active low read enable (RDB).This signal
is pulsed low to enable a T1XC register
read access. The T1XC drives the D[7:0]
bus with the contents of the addressed
register while RDB and CSB are both
low.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
31
PMC [ PMC-SIERRA, INC ]
