PM4341AT1XC
DATA SHEET
PMC-900602
ISSUE 7
T1 FRAMER/TRANSCEIVER
Register 1EH: ELSTTrouble Code
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
D7
D6
D5
D4
D3
D2
D1
D0
1
1
1
1
1
1
1
1
This register allows the Trouble Code, transmitted in place of channel data when
the framer is out of frame, to be programmed to any 8-bit value. A common
requirement during a out of frame condition is to insert all ones in the channel
data, therefore, the Trouble Code register is set to all ones when the T1XC is
reset. The code is transmitted from MSB (D7) to LSB (D0).
The writing of the trouble code pattern into the register is asynchronous with
respect to the clocks within the T1XC. One channel of trouble code data will
always be corrupted if the register is written while the receiver is out of frame.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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