STANDARD PRODUCT
PM4328 TECT3
DATASHEET
PMC-2011596
ISSUE 1
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
9.25 M23 Multiplexer (MX23)
The M23 Multiplexer (MX23) integrates circuitry required to asynchronously
multiplex and demultiplex seven DS2 streams into, and out of, an M23 or C-bit
Parity formatted DS3 serial stream.
When multiplexing seven DS2 streams into an M23 formatted DS3 stream, the
MX23 TSB performs rate adaptation to the DS3 by integral FIFO buffers,
controlled by timing circuitry. The C-bits are also generated and inserted by the
timing circuitry. Software control is provided to transmit DS2 AIS and DS2
payload loopback requests. The loopback request is coded by inverting one of
the three C-bits (the default option is compatible with ANSI T1.107a Section
8.2.1 and TR-TSY-000009 Section 3.7). The TSB also supports generation of a
C-bit Parity formatted DS3 stream by providing an internally generated DS2 rate
clock corresponding to a 100% stuffing ratio. Integrated M13 applications are
supported by providing an internally generated DS2 rate clock corresponding to a
39.1% stuffing ratio.
When demultiplexing seven DS2 streams from an M23 formatted DS3, the MX23
performs bit destuffing via interpretation of the C-bits. The MX23 also detects
and indicates DS2 payload loopback requests encoded in the C-bits. As per
ANSI T1.107a Section 8.2.1 and TR-TSY-000009 Section 3.7, the loopback
command is identified as C3 being the inverse of C1 and C2. Because TR-TSY-
000233 Section 5.3.14.1 recommends compatibility with non-compliant existing
equipment, the two other loopback command possibilities are also supported. As
per TR-TSY-000009 Section 3.7, the loopback request must be present for five
successive M-frames before declaration of detection. Removal of the loopback
request is declared when it has been absent for five successive M-frames.
DS2 payload loopback can be activated or deactivated under software control.
During payload loopback the DS2 stream being looped back still continues
unaffected in the demultiplex direction to the DS2 Framer. All seven
demultiplexed DS2 streams can also be replaced with AIS on an individual basis
under register control or they can be configured to be replaced automatically on
detection of out of frame, loss of signal, RED alarm or alarm indication signal.
9.26 DS2 Framer (DS2-FRMR)
The FRMR DS2 Framer integrates circuitry required for framing to a DS2 bit
stream and is directly compatible with the M12 DS2 application. The FRMR can
also be configured to frame to a G.747 bit stream.
The DS2 FRMR frames to a DS2 signal with a maximum average reframe time
of less than 7 ms and frames to a G.747 signal with a maximum average reframe
PROPRIETARY AND CONFIDENTIAL
82
PMC [ PMC-SIERRA, INC ]
