PRELIMINARY
PM4318 OCTLIU
DATASHEET
PMC- 2001578
ISSUE 3
OCTAL E1/T1/J1 LINE INTERFACE DEVICE
Register 06AH, 0EAH, 16AH, 1EAH, 26AH, 2EAH, 36AH, 3EAH:
XLPG Pulse Waveform Storage Write Address #1
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
SAMPLE[4]
SAMPLE[3]
SAMPLE[2]
SAMPLE[1]
SAMPLE[0]
UI[2]
0
0
0
0
0
0
0
0
UI[1]
UI[0]
UI[2:0]:
The pulse waveform write address is composed of a unit interval selector, a sample selector
and a waveform number. The unit interval selector (UI[2:0]) specifies the unit interval portion
of the address. There are 5 unit intervals, numbered from 0 to 4. UI[2:0] can take the values
0H, 1H, 2H, 3H and 4H. The values 5H, 6H and 7H are undefined.
SAMPLE[4:0]:
The pulse waveform write address is composed of a unit interval selector, a sample selector
and a waveform number. The sample selector (SAMPLE[4:0]) specifies the sample portion of
the address. There are 24 samples, numbered from 0 to 23. SAMPLE[4:0] can thus have
any value from 00H to 17H. The values from 18H to 1FH are undefined.
Note – The Pulse Waveform Storage Write Indirect Address Registers #1 and #2 must be written
to before the Pulse Waveform Storage Data register. In addition, waveform samples must be
written in groups of 5. Within each group of 5 writes, the waveform number and sample selector
must remain constant and the unit interval selector must be set to 0x0, 0x1, 0x2, 0x3 and 0x4 in
sequence. See the Operation section for more details on setting up waveform templates.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
149
PMC [ PMC-SIERRA, INC ]
