PRELIMINARY
PM4318 OCTLIU
DATASHEET
PMC- 2001578
ISSUE 3
OCTAL E1/T1/J1 LINE INTERFACE DEVICE
Register 06BH, 0EBH, 16BH, 1EBH, 26BH, 2EBH, 36BH, 3EBH:
XLPG Pulse Waveform Storage Write Address #2
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
Unused
X
X
X
X
0
0
0
0
Unused
Unused
R/W
R/W
R/W
R/W
WAVEFORM[3]
WAVEFORM[2]
WAVEFORM[1]
WAVEFORM[0]
WAVEFORM[3:0]:
The pulse waveform write address is composed of a unit interval selector, a sample selector
and a waveform number. The waveform number (WAVEFORM[3:0]) specifies the waveform
portion of the address. There are 12 waveforms, numbered from 0 to 11. WAVEFORM[3:0]
can thus have any value from 0H to BH. The values from CH to FH are undefined.
Note – The Pulse Waveform Storage Write Indirect Address Registers #1 and #2 must be written
to before the Pulse Waveform Storage Data register. In addition, waveform samples must be
written in groups of 5. Within each group of 5 writes, the waveform number and sample selector
must remain constant and the unit interval selector must be set to 0x0, 0x1, 0x2, 0x3 and 0x4 in
sequence. See the Operation section for more details on setting up waveform templates.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
150
PMC [ PMC-SIERRA, INC ]
