PRELIMINARY
PM4318 OCTLIU
DATASHEET
PMC- 2001578
ISSUE 3
OCTAL E1/T1/J1 LINE INTERFACE DEVICE
Register 046H, 0C6H, 146H, 1C6H, 246H, 2C6H, 346H, 3C6H: T1 XIBC Control
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
EN
Reserved
Unused
Unused
Unused
Unused
CL1
0
0
X
X
X
X
0
R/W
R/W
CL0
0
When the E1/T1B bit of the Global Configuration register is a logic 1, this register is held reset.
EN:
The EN bit controls whether the Inband Code is transmitted or not. A logic 1 in the EN bit
position enables transmission of inband codes; a logic 0 in the EN bit position disables
inband code transmission.
Reserved:
The reserved bit must be set to 0 for correct operation of the OCTLIU device.
CL1, CL0:
The bit positions CL1 and CL0 of this register indicate the length of the inband loopback code
sequence, as follows:
Table 11 – Transmit In-band Code Length
CL1
CL0
Code Length
0
0
1
1
0
1
0
1
5
6
7
8
Codes of 3 or 4 bits in length may be accommodated by treating them as half of a double-sized
code (i.e., a 3-bit code would use the 6-bit code length setting).
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
114
PMC [ PMC-SIERRA, INC ]
