PRELIMINARY
PM4318 OCTLIU
DATASHEET
PMC- 2001578
ISSUE 3
OCTAL E1/T1/J1 LINE INTERFACE DEVICE
this bit may not return a logic 1 even though a pulse density violation has occurred. When the
XPDE is enabled for pulse stuffing, PDV remains logic 0.
PDVI, Z16DI:
The PDVI and Z16DI bits identify the source of a generated interrupt. PDVI is a logic 1
whenever a change in the pulse density violation indication generated an interrupt. PDVI is
cleared to 0 when this register is read. Z16DI is a logic 1 whenever 16 consecutive zeros are
detected. Z16DI is cleared to 0 when this register is read. Note that the PDVI and Z16DI
interrupt indications operate regardless of whether the corresponding interrupt enables are
enabled or disabled. When STUFF is set to logic 1, the PDVI and Z16DI bits are forced to
logic 0.
Z16DE:
The Z16DE bit enables an interrupt to be generated on the microprocessor INTB pin when
16 consecutive zeros are detected. When Z16DE is set to logic 1, interrupt is generation is
enabled. When Z16DE is set to logic 0, interrupt generation is disabled.
PDVE:
The PDVE bit enables an interrupt to be generated on the microprocessor INTB pin when a
change in the pulse density is detected. When PDVE is set to logic 1, an interrupt is
generated whenever a pulse density violation occurs or when the pulse density ceases to
exist (if STUFE is logic 0). When PDVE is set to logic 0, interrupt generation by pulse density
violations is disabled.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
113
PMC [ PMC-SIERRA, INC ]
