PRELIMINARY
PM4318 OCTLIU
DATASHEET
PMC- 2001578
ISSUE 3
OCTAL E1/T1/J1 LINE INTERFACE DEVICE
Register 041H, 0C1H, 141H, 1C1H, 241H, 2C1H, 341H, 3C1H:
ELST Interrupt Enable/Status
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
Unused
Unused
Unused
Unused
SLIPEE
SLIPD
X
X
X
X
X
0
R/W
R
X
X
R
SLIPI
SLIPE:
The SLIPE bit enables an interrupt to be generated on the microprocessor INTB pin when a
frame slip occurs in the Elastic Store. When SLIPE is set to logic 1, interrupt generation is
enabled. When SLIPE is set to logic 0, interrupt generation is disabled.
SLIPD:
The SLIPD bit indicates the direction of the last frame slip. When SLIPD is set to logic 1, the
last frame slip was a write slip (frame skipped due to buffer becoming full). When SLIPE is
set to logic 0, the last frame slip was a read slip (frame repeated due to buffer becoming
empty).
SLIPI:
The SLIPI bit indicates the occurrence of a frame slip when set to 1. SLIPI is cleared to 0
when this register is read. Note that the SLIPI interrupt indication operates regardless of
whether interrupts are enabled or disabled.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
110
PMC [ PMC-SIERRA, INC ]
